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SMBus/I 2 C Interfaced 9-Port,
Level-Translating GPIO and LED Driver with CLA
PORT_ [2]
(DEBOUNCE)
PORT_ [6]
(THRESHOLD
SELECT)
V DD
V LA
PORT_ [0]
(PORTIN)
0
1
DEBOUNCE LOGIC
I/O
TRANSITION
DETECTION
TRANSITION
DETECTION
PORT_ [4:3]
INTERRUPT
LOGIC
PORT_ [5]
INTERRUPT
ENABLE
INT
INT2
INT
INT9
Figure 1. Input Port Structure
Table 7. Port I/O Registers (I/O Port Set as an Output, Registers 0x01 to 0x09)
REGISTER BIT
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
Port I/O set bit
Output port set to
push-pull
or open drain
PWM/blink enable
Duty-cycle bit 4
Duty-cycle bit 3
Duty-cycle bit 2
Duty-cycle bit 1
Duty-cycle bit 0
VALUE
0
0
1
0
1
0/1
0/1
0/1
0/1
0/1
FUNCTION
Sets the I/O port as an output.
Sets the output type to open drain.
Sets the output type to push-pull.
Sets the output to PWM mode.
Sets the output to blink mode.
MSB of the 5-bit duty-cycle setting. See Tables 9 and 11.
Bit 3 of the 5-bit duty-cycle setting. See Tables 9 and 11.
Bit 2 of the 5-bit duty-cycle setting. See Tables 9 and 11.
Bit 1 of the 5-bit duty-cycle setting. See Tables 9 and 11.
LSB of the 5-bit duty-cycle setting. See Tables 9 and 11.
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11
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